Scott Lystig Fritchie
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342a972543
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Getting closer to understanding why test coverage appears so poor
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2015-03-02 20:20:16 +09:00 |
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Scott Lystig Fritchie
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b4f2d314c7
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More single chain manager simulation tests
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2015-03-02 20:20:16 +09:00 |
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Scott Lystig Fritchie
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e717d797b3
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Move almost all test code to test/* modules
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2015-03-02 20:20:16 +09:00 |
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Scott Lystig Fritchie
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01e3325b81
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Tiny refactoring of random number gen
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2015-03-02 20:20:16 +09:00 |
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Scott Lystig Fritchie
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d2f93e919e
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Single chain manager simulation test: no bad projection transitions!
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2015-03-02 20:20:16 +09:00 |
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Scott Lystig Fritchie
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057f958bb1
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WIP: chain manager simulation test
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2015-03-02 20:20:16 +09:00 |
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Scott Lystig Fritchie
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410c8ff7ce
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WIP: chain manager simulation test
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2015-03-02 20:20:16 +09:00 |
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Scott Lystig Fritchie
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b8c87b23ad
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WIP: chain manager simulation test
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2015-03-02 20:20:16 +09:00 |
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Scott Lystig Fritchie
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4ebc80dc39
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Add src/machi_util.erl
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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a81552ed82
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Makefile un-derp'ing
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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a5dc72834f
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Fix proj0_test for concuerror, yay!
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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4969e019b2
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Fix proj0_test for concuerror, yay!
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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e50e669b79
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TODO left off here
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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97c5789b44
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WIP: eunit tests pass, but Concuerror loops forever then errs on max retries on proj0_test
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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f7447e8953
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WIP: done (I hope) adding Lamport clocks
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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ee7bc2645b
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WIP: in the middle of adding Lamport clocks
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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b443a15542
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register op name sanity: write and _read_
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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921d90a69b
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WIP: enforce wedging and new projection writes
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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bebce51ab9
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WIP: minimal write-once projection store in FLU
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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34c8c6490a
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WIP: add Name arg to start_link()
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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2d3a29471d
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Minimal FLU0 single register, plus Concuerror tests
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2015-03-02 20:20:15 +09:00 |
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Scott Lystig Fritchie
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f378204a91
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Add fledgling log implementation based on CORFU papers (corfurl stuff)
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2015-03-02 20:20:07 +09:00 |
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