463 lines
17 KiB
HTML
463 lines
17 KiB
HTML
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<html>
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<head>
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<title>Virtual Machines</title>
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</head>
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<body>
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<h1>Virtual Machines</h1>
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<p>Required reading: Disco</p>
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<h2>Overview</h2>
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<p>What is a virtual machine? IBM definition: a fully protected and
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isolated copy of the underlying machine's hardware.</p>
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<p>Another view is that it provides another example of a kernel API.
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In contrast to other kernel APIs (unix, microkernel, and exokernel),
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the virtual machine operating system exports as the kernel API the
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processor API (e.g., the x86 interface). Thus, each program running
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in user space sees the services offered by a processor, and each
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program sees its own processor. Of course, we don't want to make a
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system call for each instruction, and in fact one of the main
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challenges in virtual machine operation systems is to design the
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system in such a way that the physical processor executes the virtual
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processor API directly, at processor speed.
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<p>
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Virtual machines can be useful for a number of reasons:
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<ol>
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<li>Run multiple operating systems on single piece of hardware. For
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example, in one process, you run Linux, and in another you run
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Windows/XP. If the kernel API is identical to the x86 (and faithly
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emulates x86 instructions, state, protection levels, page tables),
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then Linux and Windows/XP, the virual machine operationg system can
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run these <i>guest</i> operating systems without modifications.
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<ul>
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<li>Run "older" programs on the same hardware (e.g., run one x86
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virtual machine in real mode to execute old DOS apps).
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<li>Or run applications that require different operating system.
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</ul>
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<li>Fault isolation: like processes on UNIX but more complete, because
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the guest operating systems runs on the virtual machine in user space.
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Thus, faults in the guest OS cannot effect any other software.
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<li>Customizing the apparent hardware: virtual machine may have
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different view of hardware than is physically present.
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<li>Simplify deployment/development of software for scalable
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processors (e.g., Disco).
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</ol>
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</p>
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<p>If your operating system isn't a virtual machine operating system,
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what are the alternatives? Processor simulation (e.g., bochs) or
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binary emulation (WINE). Simulation runs instructions purely in
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software and is slow (e.g., 100x slow down for bochs); virtualization
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gets out of the way whenever possible and can be efficient.
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<p>Simulation gives portability whereas virtualization focuses on
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performance. However, this means that you need to model your hardware
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very carefully in software. Binary emulation focuses on just getting
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system call for a particular operating system's interface. Binary
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emulation can be hard because it is targetted towards a particular
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operating system (and even that can change between revisions).
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</p>
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<p>To provide each process with its own virtual processor that exports
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the same API as the physical processor, what features must
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the virtual machine operating system virtualize?
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<ol>
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<li>CPU: instructions -- trap all privileged instructions</li>
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<li>Memory: address spaces -- map "physical" pages managed
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by the guest OS to <i>machine</i>pages, handle translation, etc.</li>
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<li>Devices: any I/O communication needs to be trapped and passed
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through/handled appropriately.</li>
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</ol>
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</p>
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The software that implements the virtualization is typically called
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the monitor, instead of the virtual machine operating system.
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<p>Virtual machine monitors (VMM) can be implemented in two ways:
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<ol>
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<li>Run VMM directly on hardware: like Disco.</li>
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<li>Run VMM as an application (though still running as root, with
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integration into OS) on top of a <i>host</i> OS: like VMware. Provides
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additional hardware support at low development cost in
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VMM. Intercept CPU-level I/O requests and translate them into
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system calls (e.g. <code>read()</code>).</li>
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</ol>
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</p>
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<p>The three primary functions of a virtual machine monitor are:
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<ul>
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<li>virtualize processor (CPU, memory, and devices)
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<li>dispatch events (e.g., forward page fault trap to guest OS).
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<li>allocate resources (e.g., divide real memory in some way between
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the physical memory of each guest OS).
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</ul>
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<h2>Virtualization in detail</h2>
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<h3>Memory virtualization</h3>
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<p>
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Understanding memory virtualization. Let's consider the MIPS example
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from the paper. Ideally, we'd be able to intercept and rewrite all
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memory address references. (e.g., by intercepting virtual memory
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calls). Why can't we do this on the MIPS? (There are addresses that
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don't go through address translation --- but we don't want the virtual
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machine to directly access memory!) What does Disco do to get around
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this problem? (Relink the kernel outside this address space.)
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</p>
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<p>
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Having gotten around that problem, how do we handle things in general?
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</p>
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<pre>
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// Disco's tlb miss handler.
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// Called when a memory reference for virtual adddress
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// 'VA' is made, but there is not VA->MA (virtual -> machine)
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// mapping in the cpu's TLB.
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void tlb_miss_handler (VA)
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{
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// see if we have a mapping in our "shadow" tlb (which includes
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// "main" tlb)
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tlb_entry *t = tlb_lookup (thiscpu->l2tlb, va);
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if (t && defined (thiscpu->pmap[t->pa])) // is there a MA for this PA?
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tlbwrite (va, thiscpu->pmap[t->pa], t->otherdata);
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else if (t)
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// get a machine page, copy physical page into, and tlbwrite
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else
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// trap to the virtual CPU/OS's handler
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}
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// Disco's procedure which emulates the MIPS
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// instruction which writes to the tlb.
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//
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// VA -- virtual addresss
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// PA -- physical address (NOT MA machine address!)
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// otherdata -- perms and stuff
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void emulate_tlbwrite_instruction (VA, PA, otherdata)
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{
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tlb_insert (thiscpu->l2tlb, VA, PA, otherdata); // cache
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if (!defined (thiscpu->pmap[PA])) { // fill in pmap dynamically
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MA = allocate_machine_page ();
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thiscpu->pmap[PA] = MA; // See 4.2.2
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thiscpu->pmapbackmap[MA] = PA;
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thiscpu->memmap[MA] = VA; // See 4.2.3 (for TLB shootdowns)
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}
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tlbwrite (va, thiscpu->pmap[PA], otherdata);
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}
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// Disco's procedure which emulates the MIPS
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// instruction which read the tlb.
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tlb_entry *emulate_tlbread_instruction (VA)
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{
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// Must return a TLB entry that has a "Physical" address;
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// This is recorded in our secondary TLB cache.
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// (We don't have to read from the hardware TLB since
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// all writes to the hardware TLB are mediated by Disco.
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// Thus we can always keep the l2tlb up to date.)
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return tlb_lookup (thiscpu->l2tlb, va);
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}
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</pre>
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<h3>CPU virtualization</h3>
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<p>Requirements:
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<ol>
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<li>Results of executing non-privileged instructions in privileged and
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user mode must be equivalent. (Why? B/c the virtual "privileged"
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system will not be running in true "privileged" mode.)
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<li>There must be a way to protect the VM from the real machine. (Some
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sort of memory protection/address translation. For fault isolation.)</li>
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<li>There must be a way to detect and transfer control to the VMM when
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the VM tries to execute a sensitive instruction (e.g. a privileged
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instruction, or one that could expose the "virtualness" of the
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VM.) It must be possible to emulate these instructions in
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software. Can be classified into completely virtualizable
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(i.e. there are protection mechanisms that cause traps for all
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instructions), partly (insufficient or incomplete trap
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mechanisms), or not at all (e.g. no MMU).
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</ol>
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</p>
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<p>The MIPS didn't quite meet the second criteria, as discussed
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above. But, it does have a supervisor mode that is between user mode and
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kernel mode where any privileged instruction will trap.</p>
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<p>What might a the VMM trap handler look like?</p>
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<pre>
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void privilege_trap_handler (addr) {
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instruction, args = decode_instruction (addr)
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switch (instruction) {
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case foo:
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emulate_foo (thiscpu, args, ...);
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break;
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case bar:
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emulate_bar (thiscpu, args, ...);
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break;
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case ...:
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...
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}
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}
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</pre>
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<p>The <code>emulator_foo</code> bits will have to evaluate the
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state of the virtual CPU and compute the appropriate "fake" answer.
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</p>
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<p>What sort of state is needed in order to appropriately emulate all
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of these things?
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<pre>
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- all user registers
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- CPU specific regs (e.g. on x86, %crN, debugging, FP...)
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- page tables (or tlb)
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- interrupt tables
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</pre>
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This is needed for each virtual processor.
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</p>
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<h3>Device I/O virtualization</h3>
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<p>We intercept all communication to the I/O devices: read/writes to
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reserved memory addresses cause page faults into special handlers
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which will emulate or pass through I/O as appropriate.
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</p>
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<p>
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In a system like Disco, the sequence would look something like:
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<ol>
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<li>VM executes instruction to access I/O</li>
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<li>Trap generated by CPU (based on memory or privilege protection)
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transfers control to VMM.</li>
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<li>VMM emulates I/O instruction, saving information about where this
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came from (for demultiplexing async reply from hardware later) .</li>
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<li>VMM reschedules a VM.</li>
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</ol>
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</p>
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<p>
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Interrupts will require some additional work:
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<ol>
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<li>Interrupt occurs on real machine, transfering control to VMM
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handler.</li>
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<li>VMM determines the VM that ought to receive this interrupt.</li>
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<li>VMM causes a simulated interrupt to occur in the VM, and reschedules a
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VM.</li>
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<li>VM runs its interrupt handler, which may involve other I/O
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instructions that need to be trapped.</li>
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</ol>
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</p>
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<p>
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The above can be slow! So sometimes you want the guest operating
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system to be aware that it is a guest and allow it to avoid the slow
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path. Special device drivers or changing instructions that would cause
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traps into memory read/write instructions.
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</p>
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<h2>Intel x86/vmware</h2>
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<p>VMware, unlike Disco, runs as an application on a guest OS and
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cannot modify the guest OS. Furthermore, it must virtualize the x86
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instead of MIPS processor. Both of these differences make good design
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challenges.
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<p>The first challenge is that the monitor runs in user space, yet it
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must dispatch traps and it must execute privilege instructions, which
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both require kernel privileges. To address this challenge, the
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monitor downloads a piece of code, a kernel module, into the guest
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OS. Most modern operating systems are constructed as a core kernel,
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extended with downloadable kernel modules.
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Privileged users can insert kernel modules at run-time.
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<p>The monitor downloads a kernel module that reads the IDT, copies
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it, and overwrites the hard-wired entries with addresses for stubs in
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the just downloaded kernel module. When a trap happens, the kernel
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module inspects the PC, and either forwards the trap to the monitor
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running in user space or to the guest OS. If the trap is caused
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because a guest OS execute a privileged instructions, the monitor can
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emulate that privilege instruction by asking the kernel module to
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perform that instructions (perhaps after modifying the arguments to
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the instruction).
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<p>The second challenge is virtualizing the x86
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instructions. Unfortunately, x86 doesn't meet the 3 requirements for
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CPU virtualization. the first two requirements above. If you run
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the CPU in ring 3, <i>most</i> x86 instructions will be fine,
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because most privileged instructions will result in a trap, which
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can then be forwarded to vmware for emulation. For example,
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consider a guest OS loading the root of a page table in CR3. This
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results in trap (the guest OS runs in user space), which is
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forwarded to the monitor, which can emulate the load to CR3 as
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follows:
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<pre>
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// addr is a physical address
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void emulate_lcr3 (thiscpu, addr)
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{
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thiscpu->cr3 = addr;
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Pte *fakepdir = lookup (addr, oldcr3cache);
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if (!fakepdir) {
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fakedir = ppage_alloc ();
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store (oldcr3cache, addr, fakedir);
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// May wish to scan through supplied page directory to see if
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// we have to fix up anything in particular.
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// Exact settings will depend on how we want to handle
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// problem cases below and our own MM.
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}
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asm ("movl fakepdir,%cr3");
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// Must make sure our page fault handler is in sync with what we do here.
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}
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</pre>
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<p>To virtualize the x86, the monitor must intercept any modifications
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to the page table and substitute appropriate responses. And update
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things like the accessed/dirty bits. The monitor can arrange for this
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to happen by making all page table pages inaccessible so that it can
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emulate loads and stores to page table pages. This setup allow the
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monitor to virtualize the memory interface of the x86.</p>
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<p>Unfortunately, not all instructions that must be virtualized result
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in traps:
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<ul>
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<li><code>pushf/popf</code>: <code>FL_IF</code> is handled different,
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for example. In user-mode setting FL_IF is just ignored.</li>
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<li>Anything (<code>push</code>, <code>pop</code>, <code>mov</code>)
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that reads or writes from <code>%cs</code>, which contains the
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privilege level.
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<li>Setting the interrupt enable bit in EFLAGS has different
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semantics in user space and kernel space. In user space, it
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is ignored; in kernel space, the bit is set.
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<li>And some others... (total, 17 instructions).
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</ul>
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These instructions are unpriviliged instructions (i.e., don't cause a
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trap when executed by a guest OS) but expose physical processor state.
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These could reveal details of virtualization that should not be
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revealed. For example, if guest OS sets the interrupt enable bit for
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its virtual x86, the virtualized EFLAGS should reflect that the bit is
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set, even though the guest OS is running in user space.
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<p>How can we virtualize these instructions? An approach is to decode
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the instruction stream that is provided by the user and look for bad
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instructions. When we find them, replace them with an interrupt
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(<code>INT 3</code>) that will allow the VMM to handle it
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|
|
correctly. This might look something like:
|
||
|
|
</p>
|
||
|
|
|
||
|
|
<pre>
|
||
|
|
void initcode () {
|
||
|
|
scan_for_nonvirtual (0x7c00);
|
||
|
|
}
|
||
|
|
|
||
|
|
void scan_for_nonvirtualizable (thiscpu, startaddr) {
|
||
|
|
addr = startaddr;
|
||
|
|
instr = disassemble (addr);
|
||
|
|
while (instr is not branch or bad) {
|
||
|
|
addr += len (instr);
|
||
|
|
instr = disassemble (addr);
|
||
|
|
}
|
||
|
|
// remember that we wanted to execute this instruction.
|
||
|
|
replace (addr, "int 3");
|
||
|
|
record (thiscpu->rewrites, addr, instr);
|
||
|
|
}
|
||
|
|
|
||
|
|
void breakpoint_handler (tf) {
|
||
|
|
oldinstr = lookup (thiscpu->rewrites, tf->eip);
|
||
|
|
if (oldinstr is branch) {
|
||
|
|
newcs:neweip = evaluate branch
|
||
|
|
scan_for_nonvirtualizable (thiscpu, newcs:neweip)
|
||
|
|
return;
|
||
|
|
} else { // something non virtualizable
|
||
|
|
// dispatch to appropriate emulation
|
||
|
|
}
|
||
|
|
}
|
||
|
|
</pre>
|
||
|
|
<p>All pages must be scanned in this way. Fortunately, most pages
|
||
|
|
probably are okay and don't really need any special handling so after
|
||
|
|
scanning them once, we can just remember that the page is okay and let
|
||
|
|
it run natively.
|
||
|
|
</p>
|
||
|
|
|
||
|
|
<p>What if a guest OS generates instructions, writes them to memory,
|
||
|
|
and then wants to execute them? We must detect self-modifying code
|
||
|
|
(e.g. must simulate buffer overflow attacks correctly.) When a write
|
||
|
|
to a physical page that happens to be in code segment happens, must
|
||
|
|
trap the write and then rescan the affected portions of the page.</p>
|
||
|
|
|
||
|
|
<p>What about self-examining code? Need to protect it some
|
||
|
|
how---possibly by playing tricks with instruction/data TLB caches, or
|
||
|
|
introducing a private segment for code (%cs) that is different than
|
||
|
|
the segment used for reads/writes (%ds).
|
||
|
|
</p>
|
||
|
|
|
||
|
|
<h2>Some Disco paper notes</h2>
|
||
|
|
|
||
|
|
<p>
|
||
|
|
Disco has some I/O specific optimizations.
|
||
|
|
</p>
|
||
|
|
<ul>
|
||
|
|
<li>Disk reads only need to happen once and can be shared between
|
||
|
|
virtual machines via copy-on-write virtual memory tricks.</li>
|
||
|
|
<li>Network cards do not need to be fully virtualized --- intra
|
||
|
|
VM communication doesn't need a real network card backing it.</li>
|
||
|
|
<li>Special handling for NFS so that all VMs "share" a buffer cache.</li>
|
||
|
|
</ul>
|
||
|
|
|
||
|
|
<p>
|
||
|
|
Disco developers clearly had access to IRIX source code.
|
||
|
|
</p>
|
||
|
|
<ul>
|
||
|
|
<li>Need to deal with KSEG0 segment of MIPS memory by relinking kernel
|
||
|
|
at different address space.</li>
|
||
|
|
<li>Ensuring page-alignment of network writes (for the purposes of
|
||
|
|
doing memory map tricks.)</li>
|
||
|
|
</ul>
|
||
|
|
|
||
|
|
<p>Performance?</p>
|
||
|
|
<ul>
|
||
|
|
<li>Evaluated in simulation.</li>
|
||
|
|
<li>Where are the overheads? Where do they come from?</li>
|
||
|
|
<li>Does it run better than NUMA IRIX?</li>
|
||
|
|
</ul>
|
||
|
|
|
||
|
|
<p>Premise. Are virtual machine the preferred approach to extending
|
||
|
|
operating systems? Have scalable multiprocessors materialized?</p>
|
||
|
|
|
||
|
|
<h2>Related papers</h2>
|
||
|
|
|
||
|
|
<p>John Scott Robin, Cynthia E. Irvine. <a
|
||
|
|
href="http://www.cs.nps.navy.mil/people/faculty/irvine/publications/2000/VMM-usenix00-0611.pdf">Analysis of the
|
||
|
|
Intel Pentium's Ability to Support a Secure Virtual Machine
|
||
|
|
Monitor</a>.</p>
|
||
|
|
|
||
|
|
<p>Jeremy Sugerman, Ganesh Venkitachalam, Beng-Hong Lim. <a
|
||
|
|
href="http://www.vmware.com/resources/techresources/530">Virtualizing
|
||
|
|
I/O Devices on VMware Workstation's Hosted Virtual Machine
|
||
|
|
Monitor</a>. In Proceedings of the 2001 Usenix Technical Conference.</p>
|
||
|
|
|
||
|
|
<p>Kevin Lawton, Drew Northup. <a
|
||
|
|
href="http://savannah.nongnu.org/projects/plex86">Plex86 Virtual
|
||
|
|
Machine</a>.</p>
|
||
|
|
|
||
|
|
<p><a href="http://www.cl.cam.ac.uk/netos/papers/2003-xensosp.pdf">Xen
|
||
|
|
and the Art of Virtualization</a>, Paul Barham, Boris
|
||
|
|
Dragovic, Keir Fraser, Steven Hand, Tim Harris, Alex Ho, Rolf
|
||
|
|
Neugebauer, Ian Pratt, Andrew Warfield, SOSP 2003</p>
|
||
|
|
|
||
|
|
<p><a href="http://www.vmware.com/pdf/asplos235_adams.pdf">A comparison of
|
||
|
|
software and hardware techniques for x86 virtualizaton</a>Keith Adams
|
||
|
|
and Ole Agesen, ASPLOS 2006</p>
|
||
|
|
|
||
|
|
</body>
|
||
|
|
|
||
|
|
</html>
|
||
|
|
|