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comment what +m means; omit needless __

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rsc 2007-08-24 00:34:54 +00:00
parent 2aae720537
commit 68ae4cc127
1 changed files with 27 additions and 25 deletions
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52
x86.h
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@ -1,39 +1,39 @@
// Special assembly routines to access x86-specific // Special assembly routines to access x86-specific
// hardware instructions. // hardware instructions.
static __inline uchar static inline uchar
inb(ushort port) inb(ushort port)
{ {
uchar data; uchar data;
__asm __volatile("in %1,%0" : "=a" (data) : "d" (port)); asm volatile("in %1,%0" : "=a" (data) : "d" (port));
return data; return data;
} }
static __inline void static inline void
insl(int port, void *addr, int cnt) insl(int port, void *addr, int cnt)
{ {
__asm __volatile("cld\n\trepne\n\tinsl" : asm volatile("cld\n\trepne\n\tinsl" :
"=D" (addr), "=c" (cnt) : "=D" (addr), "=c" (cnt) :
"d" (port), "0" (addr), "1" (cnt) : "d" (port), "0" (addr), "1" (cnt) :
"memory", "cc"); "memory", "cc");
} }
static __inline void static inline void
outb(ushort port, uchar data) outb(ushort port, uchar data)
{ {
__asm __volatile("out %0,%1" : : "a" (data), "d" (port)); asm volatile("out %0,%1" : : "a" (data), "d" (port));
} }
static __inline void static inline void
outw(ushort port, ushort data) outw(ushort port, ushort data)
{ {
__asm __volatile("out %0,%1" : : "a" (data), "d" (port)); asm volatile("out %0,%1" : : "a" (data), "d" (port));
} }
static __inline void static inline void
outsl(int port, const void *addr, int cnt) outsl(int port, const void *addr, int cnt)
{ {
__asm __volatile("cld\n\trepne\n\toutsl" : asm volatile("cld\n\trepne\n\toutsl" :
"=S" (addr), "=c" (cnt) : "=S" (addr), "=c" (cnt) :
"d" (port), "0" (addr), "1" (cnt) : "d" (port), "0" (addr), "1" (cnt) :
"cc"); "cc");
@ -41,7 +41,7 @@ outsl(int port, const void *addr, int cnt)
struct segdesc; struct segdesc;
static __inline void static inline void
lgdt(struct segdesc *p, int size) lgdt(struct segdesc *p, int size)
{ {
volatile ushort pd[3]; volatile ushort pd[3];
@ -55,7 +55,7 @@ lgdt(struct segdesc *p, int size)
struct gatedesc; struct gatedesc;
static __inline void static inline void
lidt(struct gatedesc *p, int size) lidt(struct gatedesc *p, int size)
{ {
volatile ushort pd[3]; volatile ushort pd[3];
@ -67,27 +67,27 @@ lidt(struct gatedesc *p, int size)
asm volatile("lidt (%0)" : : "r" (pd)); asm volatile("lidt (%0)" : : "r" (pd));
} }
static __inline void static inline void
ltr(ushort sel) ltr(ushort sel)
{ {
__asm __volatile("ltr %0" : : "r" (sel)); asm volatile("ltr %0" : : "r" (sel));
} }
static __inline uint static inline uint
read_eflags(void) read_eflags(void)
{ {
uint eflags; uint eflags;
__asm __volatile("pushfl; popl %0" : "=r" (eflags)); asm volatile("pushfl; popl %0" : "=r" (eflags));
return eflags; return eflags;
} }
static __inline void static inline void
write_eflags(uint eflags) write_eflags(uint eflags)
{ {
__asm __volatile("pushl %0; popfl" : : "r" (eflags)); asm volatile("pushl %0; popfl" : : "r" (eflags));
} }
static __inline void static inline void
cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp) cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp)
{ {
uint eax, ebx, ecx, edx; uint eax, ebx, ecx, edx;
@ -104,27 +104,29 @@ cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp)
*edxp = edx; *edxp = edx;
} }
static __inline uint static inline uint
cmpxchg(uint oldval, uint newval, volatile uint* lock_addr) cmpxchg(uint oldval, uint newval, volatile uint* lock_addr)
{ {
uint result; uint result;
__asm__ __volatile__("lock; cmpxchgl %2, %0" :
// The + in "+m" denotes a read-modify-write operand.
asm volatile("lock; cmpxchgl %2, %0" :
"+m" (*lock_addr), "=a" (result) : "+m" (*lock_addr), "=a" (result) :
"r"(newval), "1"(oldval) : "r"(newval), "1"(oldval) :
"cc"); "cc");
return result; return result;
} }
static __inline void static inline void
cli(void) cli(void)
{ {
__asm__ volatile("cli"); asm volatile("cli");
} }
static __inline void static inline void
sti(void) sti(void)
{ {
__asm__ volatile("sti"); asm volatile("sti");
} }
// Layout of the trap frame on the stack upon entry to trap. // Layout of the trap frame on the stack upon entry to trap.