boot more than two CPUs, each on own initial stack
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parent
7df1310b2a
commit
89eb5fbe6d
4 changed files with 35 additions and 24 deletions
15
bootother.S
15
bootother.S
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@ -10,6 +10,10 @@
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* CS limit set to 64KB;
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* CS limit set to 64KB;
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* CPL and IP set to 0.
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* CPL and IP set to 0.
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*
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*
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* mp.c causes each non-boot CPU in turn to jump to start.
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* mp.c puts the correct %esp in start-4, and the place to jump
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* to in start-8.
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*
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* Credit: Cliff Frey
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* Credit: Cliff Frey
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*/
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*/
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@ -28,8 +32,8 @@ start: .code16 # This runs in real mode
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movw %ax,%es # -> Extra Segment
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movw %ax,%es # -> Extra Segment
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movw %ax,%ss # -> Stack Segment
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movw %ax,%ss # -> Stack Segment
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# Set up the stack pointer, growing downward from 0x7000.
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# Set up the stack pointer, growing downward from 0x7000-8.
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movw $start,%sp # Stack Pointer
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movw $start-8,%sp # Stack Pointer
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#### Switch from real to protected mode
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#### Switch from real to protected mode
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#### The descriptors in our GDT allow all physical memory to be accessed.
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#### The descriptors in our GDT allow all physical memory to be accessed.
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@ -61,10 +65,9 @@ protcseg:
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movw %ax, %gs # -> GS
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movw %ax, %gs # -> GS
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movw %ax, %ss # -> SS: Stack Segment
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movw %ax, %ss # -> SS: Stack Segment
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# XXX hack
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movl start-8, %eax
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movl 0x10018, %eax # elfhdr->entry (left over in scratch space)
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movl start-4, %esp
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# subl $KERNBASE, %eax
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jmp *%eax
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jmp *%eax # this jumps to _start in kern/entry.S
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.p2align 2 # force 4 byte alignment
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.p2align 2 # force 4 byte alignment
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gdt:
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gdt:
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@ -1,3 +0,0 @@
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#define EXTPHYSMEM 0x100000
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#define KADDR(a) ((void *) a)
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37
mp.c
37
mp.c
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@ -101,6 +101,10 @@ static struct cpu {
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static int ncpu;
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static int ncpu;
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static struct cpu *bcpu;
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static struct cpu *bcpu;
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// per-cpu start-up stack, only used to get into main()
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#define MPSTACK 512
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char mpstacks[NCPU * MPSTACK];
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static int
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static int
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lapic_read(int r)
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lapic_read(int r)
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{
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{
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@ -230,17 +234,17 @@ mp_search(void)
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* 2) in the last KB of system base memory;
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* 2) in the last KB of system base memory;
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* 3) in the BIOS ROM between 0xE0000 and 0xFFFFF.
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* 3) in the BIOS ROM between 0xE0000 and 0xFFFFF.
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*/
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*/
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bda = KADDR(0x400);
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bda = (uint8_t*) 0x400;
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if((p = (bda[0x0F]<<8)|bda[0x0E])){
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if((p = (bda[0x0F]<<8)|bda[0x0E])){
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if((mp = mp_scan(KADDR(p), 1024)))
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if((mp = mp_scan((uint8_t*) p, 1024)))
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return mp;
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return mp;
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}
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}
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else{
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else{
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p = ((bda[0x14]<<8)|bda[0x13])*1024;
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p = ((bda[0x14]<<8)|bda[0x13])*1024;
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if((mp = mp_scan(KADDR(p-1024), 1024)))
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if((mp = mp_scan((uint8_t*)p-1024, 1024)))
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return mp;
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return mp;
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}
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}
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return mp_scan(KADDR(0xF0000), 0x10000);
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return mp_scan((uint8_t*)0xF0000, 0x10000);
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}
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}
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static int
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static int
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@ -260,7 +264,7 @@ mp_detect(void)
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if((mp = mp_search()) == 0 || mp->physaddr == 0)
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if((mp = mp_search()) == 0 || mp->physaddr == 0)
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return 1;
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return 1;
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pcmp = KADDR(mp->physaddr);
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pcmp = (struct MPCTB *) mp->physaddr;
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if(memcmp(pcmp, "PCMP", 4))
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if(memcmp(pcmp, "PCMP", 4))
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return 2;
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return 2;
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@ -290,7 +294,8 @@ mp_init()
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uint8_t *p, *e;
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uint8_t *p, *e;
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struct MPCTB *mpctb;
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struct MPCTB *mpctb;
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struct MPPE *proc;
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struct MPPE *proc;
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struct cpu *c;
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int c;
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extern int main();
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ncpu = 0;
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ncpu = 0;
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if ((r = mp_detect()) != 0) return;
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if ((r = mp_detect()) != 0) return;
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@ -302,8 +307,8 @@ mp_init()
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* application processors and initialising any I/O APICs. The table
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* application processors and initialising any I/O APICs. The table
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* is guaranteed to be in order such that only one pass is necessary.
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* is guaranteed to be in order such that only one pass is necessary.
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*/
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*/
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mpctb = KADDR(mp->physaddr);
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mpctb = (struct MPCTB *) mp->physaddr;
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lapicaddr = KADDR(mpctb->lapicaddr);
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lapicaddr = (uint32_t *) mpctb->lapicaddr;
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cprintf("apicaddr: %x\n", lapicaddr);
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cprintf("apicaddr: %x\n", lapicaddr);
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p = ((uint8_t*)mpctb)+sizeof(struct MPCTB);
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p = ((uint8_t*)mpctb)+sizeof(struct MPCTB);
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e = ((uint8_t*)mpctb)+mpctb->length;
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e = ((uint8_t*)mpctb)+mpctb->length;
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@ -348,16 +353,18 @@ mp_init()
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lapic_online();
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lapic_online();
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extern uint8_t _binary_bootother_start[], _binary_bootother_size[];
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extern uint8_t _binary_bootother_start[], _binary_bootother_size[];
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memmove(KADDR(APBOOTCODE),_binary_bootother_start,
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memmove((void *) APBOOTCODE,_binary_bootother_start,
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(uint32_t) _binary_bootother_size);
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(uint32_t) _binary_bootother_size);
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acquire_spinlock(&kernel_lock);
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acquire_spinlock(&kernel_lock);
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for (c = cpus; c < &cpus[ncpu]; c++) {
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for(c = 0; c < ncpu; c++){
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if (c == bcpu) continue;
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if (cpus+c == bcpu) continue;
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cprintf ("starting processor %d\n", c - cpus);
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cprintf ("starting processor %d\n", c);
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release_grant_spinlock(&kernel_lock, c - cpus);
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release_grant_spinlock(&kernel_lock, c);
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lapic_startap(c, (uint32_t) KADDR(APBOOTCODE));
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*(unsigned *)(APBOOTCODE-4) = (unsigned) mpstacks + (c + 1) * MPSTACK; // tell it what to use for %esp
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*(unsigned *)(APBOOTCODE-8) = (unsigned)&main; // tell it where to jump to
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lapic_startap(cpus + c, (uint32_t) APBOOTCODE);
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acquire_spinlock(&kernel_lock);
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acquire_spinlock(&kernel_lock);
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cprintf ("done starting processor %d\n", c - cpus);
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cprintf ("done starting processor %d\n", c);
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}
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}
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}
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}
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4
proc.c
4
proc.c
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@ -112,6 +112,10 @@ swtch()
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acquire_spinlock(&kernel_lock);
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acquire_spinlock(&kernel_lock);
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}
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}
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// XXX this may be too late, should probably save on the way
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// in, in case some other CPU decided to run curproc
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// before we got here. in fact setting state=WAITING and
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// setting these variables had better be atomic w.r.t. other CPUs.
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op->ebp = read_ebp();
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op->ebp = read_ebp();
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op->esp = read_esp();
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op->esp = read_esp();
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