Re: why cpuid() in locking code?
rtm wrote: > Why does acquire() call cpuid()? Why does release() call cpuid()? The cpuid in acquire is redundant with the cmpxchg, as you said. I have removed the cpuid from acquire. The cpuid in release is actually doing something important, but not on the hardware. It keeps gcc from reordering the lock->locked assignment above the other two during optimization. (Not that current gcc -O2 would choose to do that, but it is allowed to.) I have replaced the cpuid in release with a "gcc barrier" that keeps gcc from moving things around but has no hardware effect. On a related note, I don't think the cpuid in mpmain is necessary, for the same reason that the cpuid wasn't needed in release. As to the question of whether acquire(); x = protected; release(); might read protected after release(), I still haven't convinced myself whether it can. I'll put the cpuid back into release if we determine that it can. Russ
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3 changed files with 9 additions and 9 deletions
1
main.c
1
main.c
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@ -50,7 +50,6 @@ mpmain(void)
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if(cpu() != mp_bcpu())
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lapic_init(cpu());
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setupsegs(0);
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cpuid(0, 0, 0, 0, 0); // memory barrier
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cpus[cpu()].booted = 1;
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scheduler();
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16
spinlock.c
16
spinlock.c
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@ -10,6 +10,12 @@
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extern int use_console_lock;
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// Barrier to gcc's instruction reordering.
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static void inline gccbarrier(void)
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{
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asm volatile("" : : : "memory");
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}
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void
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initlock(struct spinlock *lock, char *name)
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{
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@ -32,10 +38,6 @@ acquire(struct spinlock *lock)
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while(cmpxchg(0, 1, &lock->locked) == 1)
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;
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// Serialize instructions: now that lock is acquired, make sure
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// we wait for all pending writes from other processors.
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cpuid(0, 0, 0, 0, 0); // memory barrier (see Ch 7, IA-32 manual vol 3)
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// Record info about lock acquisition for debugging.
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// The +10 is only so that we can tell the difference
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// between forgetting to initialize lock->cpu
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@ -54,11 +56,9 @@ release(struct spinlock *lock)
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lock->pcs[0] = 0;
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lock->cpu = 0xffffffff;
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// Serialize instructions: before unlocking the lock, make sure
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// to flush any pending memory writes from this processor.
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cpuid(0, 0, 0, 0, 0); // memory barrier (see Ch 7, IA-32 manual vol 3)
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gccbarrier(); // Keep gcc from moving lock->locked = 0 earlier.
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lock->locked = 0;
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popcli();
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}
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1
x86.h
1
x86.h
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@ -96,6 +96,7 @@ write_eflags(uint eflags)
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asm volatile("pushl %0; popfl" : : "r" (eflags));
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}
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// XXX: Kill this if not used.
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static inline void
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cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp)
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{
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