rsc
90d975e9c8
comment bochs nonsense
2007-09-26 23:32:47 +00:00
rsc
d5596cd61d
Apparently the initial interrupt count lapic[TICR]
...
must be set *after* initializing the lapic[TIMER] vector.
Doing this, we now get clock interrupts on cpu 1.
(No idea why we always got them on cpu 0.)
Don't write to TCCR - it is read-only.
2007-09-26 20:34:12 +00:00
rsc
558ab49f13
delete unnecessary #include lines
2007-08-27 23:26:33 +00:00
rsc
99b11b6c64
Simplify MP hardware code.
...
Mainly delete unused constants and code.
Move mp_startthem to main.c as bootothers.
2007-08-27 22:53:31 +00:00
rsc
b63bb0fd00
Clean up lapic code.
...
One initialization function now, not three.
Use #defines instead of enums (consistent with other code, but sigh).
Still boots in Bochs in SMP mode.
2007-08-27 16:57:13 +00:00
rsc
6861140a66
replace bogus loops with slightly less bogus loops.
2007-08-10 17:05:46 +00:00
rsc
4fb684548a
formatting nits
2006-09-08 15:14:43 +00:00
kaashoek
5c596bb3a7
consistency.
2006-09-08 15:07:45 +00:00
kaashoek
f70172129c
run without lapic and ioapic, if they are not present
...
if no lapic available, use 8253pit for clock
now xv6 runs both on qemu (uniprocessor) and bochs (uniprocessor and MP)
2006-09-07 01:37:58 +00:00
rsc
0cfc7290e8
wrap long lines
2006-09-06 19:08:14 +00:00
rsc
799c9176bc
more tabs go away
2006-09-06 17:53:15 +00:00
rsc
f552738889
no /* */ comments
2006-09-06 17:50:20 +00:00
rsc
9e9bcaf143
standardize various * conventions
2006-09-06 17:27:19 +00:00
kaashoek
a81e02133a
a few nits
2006-09-04 12:41:27 +00:00
kaashoek
801affcd14
centralize credits
2006-09-03 15:10:33 +00:00
rtm
dfcc5b997c
prune unneeded panics and debug output
2006-08-29 19:06:37 +00:00
kaashoek
8b58e81077
i/o redirection in sh
...
better parsing of sh commands (copied from jos sh)
cat: read from 1 if no args
sbrk system call, but untested
getpid system call
moved locks in keyboard intr, but why do we get intr w. null characters from keyboard?
2006-08-23 01:09:24 +00:00
rtm
0e84a0ec6e
fix race in holding() check in acquire()
...
give cpu1 a TSS and gdt for when it enters scheduler()
and a pseudo proc[] entry for each cpu
cpu0 waits for each other cpu to start up
read() for files
2006-08-08 19:58:06 +00:00
kaashoek
c8b29f6d03
better interrupt plan---this one appears to work
...
ioapic
2006-08-04 18:12:31 +00:00
rtm
2927081628
uint32_t -> uint &c
2006-07-20 09:07:53 +00:00
rsc
c54c79267f
nitpicks
2006-07-17 01:25:22 +00:00
rsc
96e16b96c9
no memlayout.h
2006-07-16 16:04:44 +00:00
kaashoek
d9872ffa95
and the file
2006-07-12 17:19:24 +00:00
