eaea18cb9c
Various changes made while offline. + bwrite sector argument is redundant; use b->sector. + reformatting of files for nicer PDF page breaks + distinguish between locked, unlocked inodes in type signatures + change FD_FILE to FD_INODE + move userinit (nee proc0init) to proc.c + move ROOTDEV to param.h + always parenthesize sizeof argument
94 lines
2.2 KiB
C
94 lines
2.2 KiB
C
#include "types.h"
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#include "param.h"
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#include "mmu.h"
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#include "proc.h"
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#include "defs.h"
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#include "x86.h"
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#include "traps.h"
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#include "syscall.h"
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#include "elf.h"
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#include "param.h"
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#include "spinlock.h"
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extern char edata[], end[];
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// Bootstrap processor starts running C code here.
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// This is called main0 not main so that it can have
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// a void return type. Gcc can't handle functions named
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// main that don't return int. Really.
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void
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main0(void)
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{
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int i;
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static int bcpu; // cannot be on stack
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// clear BSS
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memset(edata, 0, end - edata);
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// Prevent release() from enabling interrupts.
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for(i=0; i<NCPU; i++)
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cpus[i].nlock = 1;
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mp_init(); // collect info about this machine
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bcpu = mp_bcpu();
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// switch to bootstrap processor's stack
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asm volatile("movl %0, %%esp" : : "r" (cpus[bcpu].mpstack+MPSTACK-32));
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asm volatile("movl %0, %%ebp" : : "r" (cpus[bcpu].mpstack+MPSTACK));
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lapic_init(bcpu);
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cprintf("\ncpu%d: starting xv6\n\n", cpu());
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pinit(); // process table
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binit(); // buffer cache
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pic_init(); // interrupt controller
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ioapic_init(); // another interrupt controller
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kinit(); // physical memory allocator
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tvinit(); // trap vectors
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idtinit(); // interrupt descriptor table
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fileinit(); // file table
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iinit(); // inode cache
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setupsegs(0); // segments & TSS
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console_init(); // I/O devices & their interrupts
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ide_init(); // disk
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mp_startthem(); // other CPUs
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if(ismp){
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lapic_timerinit(); // smp timer
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lapic_enableintr(); // local interrupts
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}else
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pit8253_timerinit(); // uniprocessor timer
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userinit(); // first user process
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// enable interrupts on this processor.
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cpus[cpu()].nlock--;
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sti();
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scheduler();
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}
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// Additional processors start here.
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void
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mpmain(void)
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{
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cprintf("cpu%d: starting\n", cpu());
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idtinit(); // CPU's idt
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if(cpu() == 0)
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panic("mpmain on cpu 0");
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lapic_init(cpu());
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lapic_timerinit();
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lapic_enableintr();
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// make sure there's a TSS
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setupsegs(0);
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cpuid(0, 0, 0, 0, 0); // memory barrier
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cpus[cpu()].booted = 1;
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// Enable interrupts on this processor.
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cpus[cpu()].nlock--;
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sti();
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scheduler();
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}
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